#loongarch架构介绍# [五] TLB维护 原创 精华

// invtlb指令中的op
enum invtlb_ops {
    /* Invalid all tlb */
    INVTLB_ALL = 0x0,
    /* Invalid current tlb */
    INVTLB_CURRENT_ALL = 0x1,
    /* Invalid all global=1 lines in current tlb */
    INVTLB_CURRENT_GTRUE = 0x2,
    /* Invalid all global=0 lines in current tlb */
    INVTLB_CURRENT_GFALSE = 0x3,
    /* Invalid global=0 and matched asid lines in current tlb */
    INVTLB_GFALSE_AND_ASID = 0x4,
    /* Invalid addr with global=0 and matched asid in current tlb */
    INVTLB_ADDR_GFALSE_AND_ASID = 0x5,
    /* Invalid addr with global=1 or matched asid in current tlb */
    INVTLB_ADDR_GTRUE_OR_ASID = 0x6,
    /* Invalid matched gid in guest tlb */
    INVGTLB_GID = 0x9,
    /* Invalid global=1, matched gid in guest tlb */
    INVGTLB_GID_GTRUE = 0xa,
    /* Invalid global=0, matched gid in guest tlb */
    INVGTLB_GID_GFALSE = 0xb,
    /* Invalid global=0, matched gid and asid in guest tlb */
    INVGTLB_GID_GFALSE_ASID = 0xc,
    /* Invalid global=0 , matched gid, asid and addr in guest tlb */
    INVGTLB_GID_GFALSE_ASID_ADDR = 0xd,
    /* Invalid global=1 , matched gid, asid and addr in guest tlb */
    INVGTLB_GID_GTRUE_ASID_ADDR = 0xe,
    /* Invalid all gid gva-->gpa guest tlb */
    INVGTLB_ALLGID_GVA_TO_GPA = 0x10,
    /* Invalid all gid gpa-->hpa tlb */
    INVTLB_ALLGID_GPA_TO_HPA = 0x11,
    /* Invalid all gid tlb, including  gva-->gpa and gpa-->hpa */
    INVTLB_ALLGID = 0x12,
    /* Invalid matched gid gva-->gpa guest tlb */
    INVGTLB_GID_GVA_TO_GPA = 0x13,
    /* Invalid matched gid gpa-->hpa tlb */
    INVTLB_GID_GPA_TO_HPA = 0x14,
    /* Invalid matched gid tlb,including gva-->gpa and gpa-->hpa */
    INVTLB_GID_ALL = 0x15,
    /* Invalid matched gid and addr gpa-->hpa tlb */
    INVTLB_GID_ADDR = 0x16,
};

/*
 * invtlb op info addr
 * (0x1 << 26) | (0x24 << 20) | (0x13 << 15) |
 * (addr << 10) | (info << 5) | op
 */
// 基于机器码封装了invtlb op info addr格式的指令
static inline void invtlb(u32 op, u32 info, u64 addr)
{
    __asm__ __volatile__(
        "parse_r addr,%0\n\t"
        "parse_r info,%1\n\t"
        ".word ((0x6498000) | (addr << 10) | (info << 5) | %2)\n\t"
        :
        : "r"(addr), "r"(info), "i"(op)
        :
        );
}

// invtlb op 0 0指令
static inline void invtlb_all(u32 op, u32 info, u64 addr)
{
    __asm__ __volatile__(
        ".word ((0x6498000) | (0 << 10) | (0 << 5) | %0)\n\t"
        :
        : "i"(op)
        :
        );
}
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context_switch(struct rq *rq, struct task_struct *prev,
|           struct task_struct *next)
|   // 更新时间片、最近进队时间等调度信息以及其他准备工作
|-> prepare_task_switch(rq, prev, next);
|
|   // 虚拟地址空间切换相关
|-> mm = next->mm;
|   oldmm = prev->active_mm;
|   if (!mm) {
|       next->active_mm = oldmm;
|       atomic_inc(&oldmm->mm_count); // 增加oldmm的引用计数
|       // 其他架构（x86）相关，这里不关注
|       enter_lazy_tlb(oldmm, next); 
|   } else
|       // 切换到用户进程，需切换进程虚拟空间
|       switch_mm(oldmm, mm, next);
|
|-> ...
|
|   // 切换任务上下文
|-> switch_to(prev, next, prev);
|   // 切换后再次被调度时向下执行
|
|   // 用barrier机制同步，
|   // 保证switch_to和finish_task_switch的执行顺序
|-> barrier();
    |   // 使用gcc内联汇编:::"memory"语法实现，
    |   // 这样编译器不会优化此语句前后的访存顺序
    |-> #define barrier() __asm__ __volatile__("": : :"memory")
|
|   // 再次被调度时，进行清理工作
|-> finish_task_switch(this_rq(), prev);
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switch_mm(struct mm_struct *prev, struct mm_struct *next,
|                struct task_struct *tsk)
|-> switch_mm_irqs_off(prev, next, tsk);
    |-> unsigned int cpu = smp_processor_id();
    |
    |   /* Check if our ASID is of an older version and thus invalid */
    |   // 如果asid不同，则需重新分配
    |-> if (!asid_valid(next, cpu))
    |       get_new_mmu_context(next, cpu);
    |
    |   // 写入asid到寄存器CSR.ASID
    |-> write_csr_asid(cpu_asid(cpu, next));
    |
    |   // 切换页表
    |-> if (next != &init_mm)
    |       csr_writeq((unsigned long)next->pgd, LOONGARCH_CSR_PGDL);
    |   else
    |       csr_writeq((unsigned long)invalid_pg_dir, LOONGARCH_CSR_PGDL);
    |
    |-> ...

#define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
#define asid_cache(cpu)      (cpu_data[cpu].asid_cache)
static inline int asid_valid(struct mm_struct *mm, unsigned int cpu)
{
    // 如果mm中的asid和当前asid_cache不同，则返回无效
    if ((cpu_context(cpu, mm) ^ asid_cache(cpu)) & asid_version_mask(cpu))
        return 0;

    return 1;
}

static inline void
get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
{
|   // 循环递增地分配新的asid，为旧的asid_cache + 1
|-> u64 asid = asid_cache(cpu);
|   if (!((++asid) & cpu_asid_mask(&cpu_data[cpu])))
|       // 当asid溢出时开始新的分配循环，此时需刷新TLB中所有用户部分
|       local_flush_tlb_user();    /* start new asid cycle */
|
|   // 将mm中asid和当前asid_cache设为新分配的asid
|-> cpu_context(cpu, mm) = asid_cache(cpu) = asid;
}
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local_flush_tlb_user(void)
|   // 刷新所有global=0的TLB表项
|-> invtlb_all(INVTLB_CURRENT_GFALSE, 0, 0);
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